Approach to LSI implementation of a 2B1Q coded echo canceler for ISDN subscriber loop transmission

M. Fukuda, S. Ohta, K. Yamaguchi, T. Tsuda, T. Gotohda, H. Gambe, S. Miyoshi, Y. Awata

    研究成果: Article査読

    1 被引用数 (Scopus)

    抄録

    An approach to large-scale-integration (LSI) implementation of the 2B1Q echo canceler for an integrated services digital network (ISDN) basic access interface is described. A hybrid architecture, using both analog and digital processing, is adopted for LSI implementation with a moderate circuit scale. Techniques using baud-rate sampling, such as √f automatic gain control (AGC) equalization by power detection, timing extraction by peak estimation and a two-stage echo canceler with divided tables, are introduced to the system. Performance characteristics are also confirmed by computer simulation and a prototype system.

    本文言語English
    ページ(範囲)233-238
    ページ数6
    ジャーナルUnknown Journal
    1
    出版ステータスPublished - 1989

    ASJC Scopus subject areas

    • メディア記述

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