ASIC CAD system based on hierarchical design-for-testability

Michiaki Emori*, Takashi Aikyo, Yasuhide Machida, Jun ichi Shikatani

*この研究の対応する著者

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

The authors propose a novel test CAD (computer-aided-design) system for ASIC (application-specific integrated circuits), including megacells which automatically insert high-testability logic. The strategy is to access megacells directly and independently. The overhead is only 2% to 3% of the total number of gates. With the proposed system, hierarchically designed logic data can be converted to high-testability logic. It is not necessary for the designers to have specialized knowledge about design-for-testability.

本文言語English
ホスト出版物のタイトルDigest of Papers - International Test Conference
出版社Publ by IEEE
ページ404-409
ページ数6
ISBN(印刷版)0818620641
出版ステータスPublished - 1990 9月
外部発表はい
イベントProceedings - International Test Conference 1990 - Washington, DC, USA
継続期間: 1990 9月 101990 9月 14

出版物シリーズ

名前Digest of Papers - International Test Conference
ISSN(印刷版)0743-1686

Conference

ConferenceProceedings - International Test Conference 1990
CityWashington, DC, USA
Period90/9/1090/9/14

ASJC Scopus subject areas

  • 工学(全般)

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