抜粋
An (M; N)-field-data extractor reads out any consecutive N bytes from an M-byte register by connecting its input/output using a multiplexer (MUX) network. It is used in packet analysis and/or stream data processing for video/audio data. In this letter, we propose an efficient MUX network for an (M; N)-field-data extractor. By bi-partitioning a simple MUX network into an upper one and a lower one, we can theoretically reduce the number of required MUXs without increasing the MUX network depth. Experimental results show that we can reduce the gate count by up to 92% compared to a naive approach.
| 元の言語 | English |
|---|---|
| ページ（範囲） | 1410-1414 |
| ページ数 | 5 |
| ジャーナル | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences |
| 巻 | E99A |
| 発行部数 | 7 |
| DOI | |
| 出版物ステータス | Published - 2016 7 1 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Computer Graphics and Computer-Aided Design
- Applied Mathematics
- Signal Processing
フィンガープリント Bi-partitioning based multiplexer network for field-data extractors' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。
これを引用
Ito, K., Kawamura, K., Tamiya, Y., Yanagisawa, M., & Togawa, N. (2016). Bi-partitioning based multiplexer network for field-data extractors. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E99A(7), 1410-1414. https://doi.org/10.1587/transfun.E99.A.1410