Bias-voltage-dependent subcircuit model for millimeter-wave CMOS circuit

Kosuke Katayama*, Mizuki Motoyoshi, Kyoya Takano, Ryuichi Fujimoto, Minoru Fujishima

*この研究の対応する著者

研究成果: Article査読

8 被引用数 (Scopus)

抄録

In this paper, we propose a new method for the bias-dependent parameter extraction of a MOSFET, which covers DC to over 100 GHz. The DC MOSFET model provided by the chip foundry is assumed to be correct, and the core DC characteristics are designed to be asymptotically recovered at low frequencies. This is carried out by representing the corrections required at high frequencies using a bias-dependent Y matrix, assuming that a parasitic nonlinear two-port matrix (Y-wrapper) is connected in parallel with the core MOSFET. The Y-wrapper can also handle the nonreciprocity of the parasitic components, that is, the asymmetry of the Y matrix. The reliability of the Y-wrapper model is confirmed through the simulation and measurement of a one-stage common-source amplifier operating at several bias points. This paper will not discuss about non-linearity.

本文言語English
ページ(範囲)1077-1085
ページ数9
ジャーナルIEICE Transactions on Electronics
E95-C
6
DOI
出版ステータスPublished - 2012 6月
外部発表はい

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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