Body bias controlled SOI technology with HTI

Mikio Tsujiuchi, Yuuichi Hirano, Toshiaki Iwamatsu, Takashi Ipposhi, Shigeto Maegawa, Masahide Inuishi, Yuzuru Ohji

研究成果: Conference contribution

抜粋

As the LSI process technology advances, increase of power consumption for the LSIs becomes major issue because of number of transistors and clock frequencies increase. For a reduction of the power consumption of the LSI, lowering supply voltage technology is one of the effective ways such as applying a dynamic threshold voltage (DT) structure as stated in J. P. Colinge (1987). However, a DT SOI MOSFET with T-shape or H-shape gates has disadvantages of area penalties and a gate parasitic capacitance increase. In this paper we describe actively body-bias controlled (ABC) SOI MOSFET technology with hybrid trench isolation (HTI) based in Y. Hirano et al. (2000). This structure doesn't need the T or H gates and realizes low-voltage and high-speed operation with controlling a body potential.

元の言語English
ホスト出版物のタイトルIMFEDK 2004 - International Meeting for Future of Electron Devices, Kansai
出版者Institute of Electrical and Electronics Engineers Inc.
ページ131-132
ページ数2
ISBN(電子版)0780384237, 9780780384231
DOI
出版物ステータスPublished - 2004
外部発表Yes
イベント2nd International Meeting for Future of Electron Devices, Kansai, IMFEDK 2004 - Kyoto, Japan
継続期間: 2004 7 262004 7 28

Other

Other2nd International Meeting for Future of Electron Devices, Kansai, IMFEDK 2004
Japan
Kyoto
期間04/7/2604/7/28

    フィンガープリント

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

これを引用

Tsujiuchi, M., Hirano, Y., Iwamatsu, T., Ipposhi, T., Maegawa, S., Inuishi, M., & Ohji, Y. (2004). Body bias controlled SOI technology with HTI. : IMFEDK 2004 - International Meeting for Future of Electron Devices, Kansai (pp. 131-132). [1566443] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IMFEDK.2004.1566443