CHANNEL ROUTERS FOR LSI LAYOUT USING MERGING TECHNIQUES.

Takeshi Yoshimura*

*この研究の対応する著者

研究成果: Article査読

3 被引用数 (Scopus)

抄録

TWO NEW ALGORITHMS ARE PROPOSED FOR THE CHANNEL ROUTING PROBLEM IN THE LAYOUT DESIGN OF LSI CHIPS. ONE OF THE ALGORITHMIS A SIMPLE ONE AND IT DEPENDS ON A PROCESS OF MERGING NETSINSTEAD OF ASSIGNING HORIZONTAL TRACKS TO INDIVIDUAL NETS. THE OTHER IS BASED ON THE SAME IDEA, BUT IT USES A MATCHING ALGORITHM TO IMPROVE THE SOLUTION. THE ALGORITHMS WERE CODEDIN FORTRAN AND IMPLEMENTED ON A VAX 11/780 COMPUTER. EXPERIMENTAL RESULTS ARE QUITE ENCOURAGING. BOTH PROGRAMS GENERATED OPTIMAL SOLUTIONS IN 6 OF 8 CASES, USING EXAMPLES IN PREVIOUSLY PUBLISHED PAPERS. THE COMPUTATION TIMES OF THE ALGORITHMS FOR A TYPICAL CHANNEL (300 TERMINAL, 70 NETS) WERE 1. 0 SECOND AND 2. 1 SECONDS, RESPECTIVELY.

本文言語English
ページ(範囲)25-35
ページ数11
ジャーナルNEC RES DEV
N 66
出版ステータスPublished - 1982 7
外部発表はい

ASJC Scopus subject areas

  • 電子工学および電気工学

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