CIRCUIT DESIGN OF DYNAMIC MOS RAM WITH CONSIDERATION OF SOFT ERROR.

Yasuji Nagayama, Masaki Kumanoya, Michihiro Yamada, Tsutomu Yoshihara, Makoto Taniguchi

研究成果: Article査読

抄録

Dynamic MOS RAMs (MOS (D) RAMs) have been developed according to scaling relationships. But it is necessary to correct the scaling relationships because of soft error. In this paper, a modified scaling law is described based on the assumption that the soft error becomes the governing condition of the scaling law. In addition, a new device structure and circuit configuration are proposed to realize high-speed, low soft error rate and low power consumption.

本文言語English
ページ(範囲)92-101
ページ数10
ジャーナルElectronics & communications in Japan
65
7
出版ステータスPublished - 1983 7
外部発表はい

ASJC Scopus subject areas

  • Engineering(all)

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