Circuit design of reconfigurable dynamic logic based on double gate cntfets focusing on number of states of back gate voltages

Junki Kato, Shigeyoshi Watanabe*, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura

*この研究の対応する著者

研究成果: Article査読

2 被引用数 (Scopus)

抄録

In this paper circuit design of reconfigurable dynamic logic based on double gate CNTFETs focusing on number of states of back gate voltages has been newly described. 16 function 9-10T DRDLC for two Boolean inputs with two states (+V, -V) of back gate voltages has been newly proposed. Using this 9-10T DRDLC the conventional 7T DRDLC with three states (+V, 0, -V) of back bate voltages is successfully derived. Furthermore, using four states (+2V, +V, 0, -V) of back gate voltages 6T DRDLC can be realized. These DRDLC with small number of DG-CNTFETs is promising candidates for realizing future high performance reconfigurable LSI.

本文言語English
ページ(範囲)39-52
ページ数14
ジャーナルContemporary Engineering Sciences
7
1-4
DOI
出版ステータスPublished - 2014
外部発表はい

ASJC Scopus subject areas

  • 材料科学(全般)
  • 社会科学(その他)
  • 工学(全般)
  • 流体および伝熱
  • コンピュータ ネットワークおよび通信
  • 健康、毒物学および変異誘発

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