Comparison of optimized multi-stage clock gating with structural gating approach

Xin Man*, Shinji Kimura

*この研究の対応する著者

研究成果: Conference contribution

7 被引用数 (Scopus)

抄録

Clock gating is a power efficient technique by switching off unnecessary clock signals to the registers. The condition under which the registers can be safely gated is checked using EXOR of the current and the next state values. Due to the extra power consumed by clock gating logics consisting of a latch and an AND gate, we have proposed an optimum sharing method of gating controls based on BDD (Binary Decision Diagram) with single-stage clock gating for power optimization. In this paper, we enhance the optimization method including multi-stage clock gating and compare with structural gating approach. By multi-stage clock gating, the activities of both registers and clock gating logics can be reduced. On a set of interface circuits, we have obtained power reduction by 14.1% on average compared with single-stage structural method and by 10.8% compared with multi-stage structural gating approach. Our BDD based method is also fast and scalable by candidates pruning.

本文言語English
ホスト出版物のタイトルTENCON 2011 - 2011 IEEE Region 10 Conference
ホスト出版物のサブタイトルTrends and Development in Converging Technology Towards 2020
ページ651-656
ページ数6
DOI
出版ステータスPublished - 2011 12 1
イベント2011 IEEE Region 10 Conference: Trends and Development in Converging Technology Towards 2020, TENCON 2011 - Bali, Indonesia
継続期間: 2011 11 212011 11 24

出版物シリーズ

名前IEEE Region 10 Annual International Conference, Proceedings/TENCON

Conference

Conference2011 IEEE Region 10 Conference: Trends and Development in Converging Technology Towards 2020, TENCON 2011
国/地域Indonesia
CityBali
Period11/11/2111/11/24

ASJC Scopus subject areas

  • コンピュータ サイエンスの応用
  • 電子工学および電気工学

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