An all-permalloy single-mask level design for serial loop devices using 3 mu m bubbles has been developed and successfully operated. The design of individual elements for single-mask level devices such as generators, replicators and annihilators which were compatible with half-disk propagation patterns was successfully tested, and optimization of permalloy and SiO//2 film thickness was achieved. The small-capacity test chips fabricated provided 13-16 Oe ″window margins″ with circular drive field ranges of 40 to 50 Oe at 100 kHz. The critical stretching pulse phase margin for replication, which was the minimum phase margin for all functions, was found to be 10 degrees. Details of design and characteristics are discussed including operating margin dependence on frequency, temperature and long term characteristics.
|ジャーナル||Fujitsu Scientific and Technical Journal|
|出版ステータス||Published - 1979 6|
ASJC Scopus subject areas
- Electrical and Electronic Engineering