DESIGN AND REALIZATION OF AN LSI PROCESSOR FOR DIGITAL SIGNAL PROCESSING.

Kazuo Murano, Shigeyuki Unagami, Toshitaka Tsuda

    研究成果: Article査読

    抄録

    This paper describes a high-speed data processing LSI unit tailored to be used for digital signal processing (DSP) applications in the field of electrical communications. Also included in this paper are the results of its successful application to the 4800-bit/sec modem. The LSI processor discussed adopts a firmware control scheme to enhance flexibility and freedom of application. Further, it extensively utilizes the pipeline processing technique to attain highh-speed data handling capability. It handles 8-bit data at a clock frequency of up to 1. 152 MHz and performs about 144 K operations per second. The LSI chip contains 1500 gates and is packaged in a 40-pin DIP.

    本文言語English
    ページ(範囲)39-53
    ページ数15
    ジャーナルFujitsu Sci Tech J
    15
    1
    出版ステータスPublished - 1979

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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