This paper presents a methodology suited for high frequency analog IC design. The use of a top-down method with AHDL for circuit designers is proposed. In order to accelerate the re-use of circuits that were previously designed and validated in other ICs, the authors developed a system that eases the re-use in the top-down design environment. Moreover, a model parameter generation technique for bipolar transistors has been developed and its usefulness has been shown for accurate simulation of high frequency analog ICs.
|ジャーナル||Proceedings - Design Automation Conference|
|出版ステータス||Published - 1996|
|イベント||Proceedings of the 1996 33rd Annual Design Automation Conference - Las Vegas, NV, USA|
継続期間: 1996 6 3 → 1996 6 7
ASJC Scopus subject areas
- Hardware and Architecture
- Control and Systems Engineering