TY - JOUR
T1 - Design methodology for analog high frequency ICs
AU - Miyahara, Yasunori
AU - Oumi, Yoshitomo
AU - Moriyama, Seijiro
PY - 1996
Y1 - 1996
N2 - This paper presents a methodology suited for high frequency analog IC design. The use of a top-down method with AHDL for circuit designers is proposed. In order to accelerate the re-use of circuits that were previously designed and validated in other ICs, the authors developed a system that eases the re-use in the top-down design environment. Moreover, a model parameter generation technique for bipolar transistors has been developed and its usefulness has been shown for accurate simulation of high frequency analog ICs.
AB - This paper presents a methodology suited for high frequency analog IC design. The use of a top-down method with AHDL for circuit designers is proposed. In order to accelerate the re-use of circuits that were previously designed and validated in other ICs, the authors developed a system that eases the re-use in the top-down design environment. Moreover, a model parameter generation technique for bipolar transistors has been developed and its usefulness has been shown for accurate simulation of high frequency analog ICs.
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U2 - 10.1145/240518.240614
DO - 10.1145/240518.240614
M3 - Conference article
AN - SCOPUS:0029716065
SP - 503
EP - 508
JO - Proceedings - Design Automation Conference
JF - Proceedings - Design Automation Conference
SN - 0738-100X
T2 - Proceedings of the 1996 33rd Annual Design Automation Conference
Y2 - 3 June 1996 through 7 June 1996
ER -