Design of low-cost approximate multipliers based on probability-driven inexact compressors

Yi Guo*, Heming Sun, Ping Lei, Shinji Kimura

*この研究の対応する著者

研究成果: Article査読

抄録

Approximate computing has emerged as a promising approach for error-tolerant applications to improve hardware performance at the cost of some loss of accuracy. Multiplication is a key arithmetic operation in these applications. In this paper, we propose a low-cost approximate multiplier design by employing new probability-driven inexact compressors. This compressor design is introduced to reduce the height of partial product matrix into two rows, based on the probability distribution of the sum result of partial products. To compensate the accuracy loss of the multiplier, a grouped error recovery scheme is proposed and achieves different levels of accuracy. In terms of mean relative error distance (MRED), the accuracy losses of the proposed multipliers are from 1.07% to 7.86%. Compared with the Wallace multiplier using 40nm process, the most accurate variant of the proposed multipliers can reduce power by 59.75% and area by 42.47%. The critical path delay reduction is larger than 12.78%. The proposed multiplier design has a better accuracy-performance tradeoff than other designs with comparable accuracy. In addition, the efficiency of the proposed multiplier design is assessed in an image processing application.

本文言語English
ページ(範囲)1781-1791
ページ数11
ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E102A
12
DOI
出版ステータスPublished - 2019

ASJC Scopus subject areas

  • 信号処理
  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • 電子工学および電気工学
  • 応用数学

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