Design optimization of copper patterns and location of power semiconductors and terminals

Yusuke Abe, Akira Hirao, Ryoichi Kato, Yoshinari Ikeda, Victor Parque, Muhammad Khairi Faiz, Makoto Yoshida, Tomoyuki Miyashita

研究成果: Conference contribution

抄録

In recent years, SiC power modules have attracted a lot of attention because they offer higher frequency and density as compared to the conventional Si power module. However high speed switching inevitably lead to the generation of surge voltage which may damage the power module. The design of layout, which composed of copper patterns, power semiconductors and terminals, is one of the factors that is necessary to overcome the problem. In this paper, the layout design of the half-bridge power module is optimized to reduce its internal inductance. The inductance was evaluated by electromagnetic field simulation.

本文言語English
ホスト出版物のタイトル2021 International Conference on Electronics Packaging, ICEP 2021
出版社Institute of Electrical and Electronics Engineers Inc.
ページ157-158
ページ数2
ISBN(電子版)9784991191114
DOI
出版ステータスPublished - 2021 5 12
イベント20th International Conference on Electronics Packaging, ICEP 2021 - Tokyo, Japan
継続期間: 2021 5 122021 5 14

出版物シリーズ

名前2021 International Conference on Electronics Packaging, ICEP 2021

Conference

Conference20th International Conference on Electronics Packaging, ICEP 2021
国/地域Japan
CityTokyo
Period21/5/1221/5/14

ASJC Scopus subject areas

  • 電子工学および電気工学
  • 材料力学
  • 電子材料、光学材料、および磁性材料
  • 器械工学

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