Dynamic security domain scaling on symmetric multiprocessors for future high-end embedded systems

Hiroaki Inoue, Akihisa Ikeno, Tsuyoshi Abe, Junji Sakai, Masato Edahiro

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

We propose a method for dynamic security domain scaling on SMPs that offers both highly scalable performance and high security for future high-end embedded systems. Its most important feature is its highly efficient use of processor resources, accomplished by dynamically changing the number of processors within a security domain in response to application load requirements. Two new technologies make this scaling possible without any virtualization software: 1) self-transition management and 2) unified virtual address mapping. Evaluations show that this domain control provides highly scalable performance and incurs almost no performance overhead in security domains. The increase in binary code size is less than 40KB, and the time required for individual state transitions is of a single-millisecond order. This scaling is the first in the world to make possible dynamic changing of the number of processors within a security domain on an ARM SMP.

本文言語English
ホスト出版物のタイトルCODES+ISSS 2007
ホスト出版物のサブタイトルInternational Conference on Hardware/Software Codesign and System Synthesis
ページ39-44
ページ数6
DOI
出版ステータスPublished - 2007
外部発表はい
イベントCODES+ISSS 2007: 5th International Conference on Hardware/Software Codesign and System Synthesis - Salzburg, Austria
継続期間: 2007 9 302007 10 3

出版物シリーズ

名前CODES+ISSS 2007: International Conference on Hardware/Software Codesign and System Synthesis

Conference

ConferenceCODES+ISSS 2007: 5th International Conference on Hardware/Software Codesign and System Synthesis
CountryAustria
CitySalzburg
Period07/9/3007/10/3

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Software

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