Experimental evaluation of high-level energy optimization based on thread partitioning

Jumpei Uchida, Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki

研究成果査読

抄録

This paper presents a thread partitioning algorithm for high-level synthesis systems which generate low energy circuits. In the algorithm, we partitions a thread into two sub-threads, one of which has RF and the other does not have RF. The partitioned sub-threads need to be synchronized with each other to keep the data dependency of the original thread. Since the partitioned sub-threads have waiting time for synchronization, gated clocks can be applied to each sub-thread. We achieve 33% energy reduction when we apply our proposed algorithm to a JPEG encoder.

本文言語English
ページ161-164
ページ数4
出版ステータスPublished - 2004 12月 1
イベント2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan, Province of China
継続期間: 2004 12月 62004 12月 9

Conference

Conference2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology
国/地域Taiwan, Province of China
CityTainan
Period04/12/604/12/9

ASJC Scopus subject areas

  • 電子工学および電気工学

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