抄録
This paper presents a thread partitioning algorithm for high-level synthesis systems which generate low energy circuits. In the algorithm, we partitions a thread into two sub-threads, one of which has RF and the other does not have RF. The partitioned sub-threads need to be synchronized with each other to keep the data dependency of the original thread. Since the partitioned sub-threads have waiting time for synchronization, gated clocks can be applied to each sub-thread. We achieve 33% energy reduction when we apply our proposed algorithm to a JPEG encoder.
本文言語 | English |
---|---|
ページ | 161-164 |
ページ数 | 4 |
出版ステータス | Published - 2004 12月 1 |
イベント | 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan, Province of China 継続期間: 2004 12月 6 → 2004 12月 9 |
Conference
Conference | 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology |
---|---|
国/地域 | Taiwan, Province of China |
City | Tainan |
Period | 04/12/6 → 04/12/9 |
ASJC Scopus subject areas
- 電子工学および電気工学