Fast custom instruction identification algorithm based on basic convex pattern model for supporting asip automated design

Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song, Satoshi Goto

研究成果: Article査読

1 被引用数 (Scopus)

抄録

In this paper, a generalized Montgomery multiplication algorithm in GF(2m) using the Toeplitz matrix-vector representation is presented. The hardware architectures derived from this algorithm provide low-complexity bit-parallel systolic multipliers with trinomials and pen-tanomials. The results reveal that our proposed multipliers reduce the space complexity of approximately 15% compared with an existing systolic Montgomery multiplier for trinomials. Moreover, the proposed architectures have the features of regularity, modularity, and local interconnection. Accordingly, they are well suited to VLSI implementation.

本文言語English
ページ(範囲)1478-1487
ページ数10
ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E91-A
6
DOI
出版ステータスPublished - 2008

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Graphics and Computer-Aided Design
  • Applied Mathematics
  • Signal Processing

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