Fast SAO estimation algorithm and its VLSI architecture

Jiayi Zhu, Dajiang Zhou, Shinji Kimura, Satoshi Goto

研究成果: Conference contribution

10 被引用数 (Scopus)

抄録

SAO estimation is the process of determining SAO parameters in video encoding. There are two difficulties for VLSI implementation of SAO estimation. The first is that there are huge amount of samples to deal with in statistic collection phase. The other is that the complexity of RDO in parameters determination phase is very high. In this article, a fast SAO estimation algorithm and its corresponding VLSI architecture are proposed. For the first difficulty, we use bitmaps to collect statistic of all the 16 samples in one 4×4 block simultaneously. For the second difficulty, we simplify a series of complicated procedures in HM to balance the complexity and BD-rate performance. Experimental results show that the proposed algorithm maintains the picture quality improvement. The VLSI design based on this algorithm can be implemented by 156.32K gates, 8832 bits SPRAM, 400MHz @ 65nm technology and is capable of 8Kx4K @ 120fps encoding.

本文言語English
ホスト出版物のタイトル2014 IEEE International Conference on Image Processing, ICIP 2014
出版社Institute of Electrical and Electronics Engineers Inc.
ページ1278-1282
ページ数5
ISBN(電子版)9781479957514
DOI
出版ステータスPublished - 2014 1月 28

出版物シリーズ

名前2014 IEEE International Conference on Image Processing, ICIP 2014

ASJC Scopus subject areas

  • コンピュータ ビジョンおよびパターン認識

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