抄録
In this paper, we propose a floorplan-driven highlevel synthesis algorithm utilizing both volatile and non-volatile registers for hybrid energy-harvesting systems. In our algorithm, we firstly introduce an idea of safety line candidates. Based on them, we perform safety-line (SL) scheduling so that every operation does not cross the safety line candidates and then perform volatile/non-volatile register binding so that all the data crossing the safety line candidates are stored into non-violate registers. We can safely restore all the data and re-start the circuit operation from every safety line candidate, even if the power shut-off occurs while running the circuit. Experimental results show that our algorithm reduces average latency by 30.76% and the average energy consumption by 24.94% compared to the naive algorithm when sufficient energy is given (normal mode). Experimental results also show that our algorithm reduces average latency by 30.58% compared to the naive algorithm by reducing rollback execution if a small amount of energy is given (energy-harvesting mode).
本文言語 | English |
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ホスト出版物のタイトル | Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017 |
出版社 | IEEE Computer Society |
ページ | 64-67 |
ページ数 | 4 |
巻 | 2017-October |
ISBN(電子版) | 9781509066247 |
DOI | |
出版ステータス | Published - 2018 1月 8 |
イベント | 12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 - Guiyang, China 継続期間: 2017 10月 25 → 2017 10月 28 |
Other
Other | 12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 |
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国/地域 | China |
City | Guiyang |
Period | 17/10/25 → 17/10/28 |
ASJC Scopus subject areas
- ハードウェアとアーキテクチャ
- 電子工学および電気工学