抄録
As more and more human-machine interactive applications call for higher frame rate and lower delay to get a better experience, there is an inevitable need for high frame rate and ultra-low delay image processing system. Current existing works based on vision chip target on video with simple patterns or simple shapes in order to get a higher speed, which is reasonable in the first trial of this new field. However, more complicated system is required for real-life applications. This paper proposes a KLT (Kanade-Lucas-Tomasi) based tracking system with high frame rate and ultra-low delay, implemented on FPGA board. And based on the framework of KLT, local maximum neighboring check, local-search based SAD (Sum of Absolute Difference) block matching and coordinate-addressed feature storage are proposed to localize the whole algorithm. In a broader framework, the whole system is made parallelized and pipelined in order to get a high throughput which can meet the high frame rate and ultra-low delay system's demand. Evaluation results show that the proposed hardware system can work at 784fps and 0.762ms delay with resolution of 640×480.
本文言語 | English |
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ホスト出版物のタイトル | Proceedings - 2017 International Conference on Machine Vision and Information Technology, CMVIT 2017 |
出版社 | Institute of Electrical and Electronics Engineers Inc. |
ページ | 93-98 |
ページ数 | 6 |
ISBN(電子版) | 9781509049936 |
DOI | |
出版ステータス | Published - 2017 3月 14 |
イベント | 2017 International Conference on Machine Vision and Information Technology, CMVIT 2017 - Singapore, Singapore 継続期間: 2017 2月 17 → 2017 2月 19 |
Other
Other | 2017 International Conference on Machine Vision and Information Technology, CMVIT 2017 |
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国/地域 | Singapore |
City | Singapore |
Period | 17/2/17 → 17/2/19 |
ASJC Scopus subject areas
- コンピュータ サイエンスの応用
- 信号処理
- コンピュータ ビジョンおよびパターン認識