Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications

Yong Ju Suh, Jiangtao Sun, Koji Horie, Nobuyuki Itoh, Toshihiko Yoshimasu

研究成果: Conference contribution

5 引用 (Scopus)

抜粋

A fully integrated novel power amplifier (PA) using 130nm CMOS process is presented for Electric Toll Collection (ETC) applications. To obtain good efficiency and high linear gain performance, a novel cascode PA based on a class E PA has been designed, fabricated and fully measured. The proposed PA is a single-ended single-stage amplifier at an operating voltage of only 2 V. The power added efficiency (PAE) of the PA is as high as 42.6% with a gain of 11.4dB at P1dB of 13.4dBm. This CMOS PA includes all matching circuits and biasing circuits, and no external components are required.

元の言語English
ホスト出版物のタイトルAPMC 2009 - Asia Pacific Microwave Conference 2009
ページ365-368
ページ数4
DOI
出版物ステータスPublished - 2009 12 1
イベントAsia Pacific Microwave Conference 2009, APMC 2009 - Singapore, Singapore
継続期間: 2009 12 72009 12 10

出版物シリーズ

名前APMC 2009 - Asia Pacific Microwave Conference 2009

Conference

ConferenceAsia Pacific Microwave Conference 2009, APMC 2009
Singapore
Singapore
期間09/12/709/12/10

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • これを引用

    Suh, Y. J., Sun, J., Horie, K., Itoh, N., & Yoshimasu, T. (2009). Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications. : APMC 2009 - Asia Pacific Microwave Conference 2009 (pp. 365-368). [5384529] (APMC 2009 - Asia Pacific Microwave Conference 2009). https://doi.org/10.1109/APMC.2009.5384529