Global code scheduling technique using guarded PDG

Akira Koseki*, Hideaki Komatsu, Yoshiaki Fukazawa

*この研究の対応する著者

研究成果: Paper査読

抄録

For instruction-level parallel machines, it is essential to extract parallel executable instructions from a program by code scheduling. In this paper, we propose a new code scheduling technique using an extension of PDG. This technique parallelizes non-numerical programs, producing better machine codes than these created by percolation scheduling.

本文言語English
ページ661-669
ページ数9
出版ステータスPublished - 1995 1 1
イベントProceedings of the IEEE 1st International Conference on Algorithms and Architectures for Parallel Processing. Part 1 (of 2) - Brisbane, Aust
継続期間: 1995 4 191995 4 21

Other

OtherProceedings of the IEEE 1st International Conference on Algorithms and Architectures for Parallel Processing. Part 1 (of 2)
CityBrisbane, Aust
Period95/4/1995/4/21

ASJC Scopus subject areas

  • コンピュータ サイエンス(全般)
  • 工学(全般)

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