GRAPH THEORETICAL COMPACTION ALGORITHM.

Takeshi Yoshimura

研究成果: Conference contribution

8 被引用数 (Scopus)

抄録

An LSI compaction method which minimizes total wire length as well as layout area is discussed. First, the compaction problem is formulated as a linear programming problem and reduced to a problem involving finding a tree which has some properties in a constraint graph. Then, a method which finds the tree by a sequence of elementary tree transformations in the graph is proposed. It corresponds to the primal simplex method for LP. However, the proposed method is much more efficient, because it does not deal with any matrices in solving the problem.

本文言語English
ホスト出版物のタイトルProceedings - IEEE International Symposium on Circuits and Systems
出版社IEEE
ページ1455-1458
ページ数4
出版ステータスPublished - 1985
外部発表はい

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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