High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin

Takumi Kamibayashi*, Hiroyuki Kuwae, Takahiro Kishioka, Yuki Usui, Takuya Ohashi, Mamoru Tamura, Shuichi Shoji, Jun Mizuno

*この研究の対応する著者

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

We developed a fabrication method of high-aspect-ratio fine vias with a build-up resin. The build-up resin composed of a thermosetting resin and silica fillers has low coefficient of thermal expansion and low dielectric constant. Thermal imprint was performed to form the high-aspect-ratio fine via holes on the build-up resin. The imprint mold with high-aspect-ratio fine pillar patterns was fabricated by photolithography and deep reactive ion etching. The residual layer consisted of the thermosetting resin and the silica filler was removed by O2/CHF3 plasma etching. The via of 1.2 μm in diameter with aspect ratio of 5.5, and 5.0 μm in pitch was successfully fabricated followed by Au electroplating. The proposed fabrication method is applicable for high-density 3-dimensional and 2.5-dimensional integration technologies.

本文言語English
ホスト出版物のタイトル13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018
出版社IEEE Computer Society
ページ115-118
ページ数4
ISBN(電子版)9781538656150
DOI
出版ステータスPublished - 2019 1 24
イベント13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018 - Taipei, Taiwan, Province of China
継続期間: 2018 10 242018 10 26

出版物シリーズ

名前Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT
2018-October
ISSN(印刷版)2150-5934
ISSN(電子版)2150-5942

Conference

Conference13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018
国/地域Taiwan, Province of China
CityTaipei
Period18/10/2418/10/26

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 制御およびシステム工学
  • 電子工学および電気工学

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