High profile intra prediction architecture for H.264

Xun He, Dajiang Zhou, Jinjia Zhou, Satoshi Goto

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

This paper presents a new architecture for high performance intra prediction in H.264/AVC video coding standard, which can support H.264 high profile features. Our goal is to design an Intra prediction engine for Ultra High Definition (UHD) Decoder (4Kx2K@60fps). The proposed architecture can achieve very stable throughput, which can process any H.264 intra prediction modes within 66 cycles. Comparing with previous design, this feature can guarantee the whole decoding pipeline to work efficiently. The proposed architecture can overlap data preparing time and prediction time, which can finish data loading and storing within 2 cycles pipeline stalls. We apply the combined module approach to achieve high throughput and low area cost for ultra high-definition video, which can support all H.264 features. The proposed architecture is verified to work at 81 MHz in a Xilinx V4 FPGA. It costs about 53.9K Gates by using TSMC 90nm and satisfies requirement of our UHD Decoder.

本文言語English
ホスト出版物のタイトル2009 International SoC Design Conference, ISOCC 2009
ページ57-60
ページ数4
DOI
出版ステータスPublished - 2009
イベント2009 International SoC Design Conference, ISOCC 2009 - Busan
継続期間: 2009 11 222009 11 24

Other

Other2009 International SoC Design Conference, ISOCC 2009
CityBusan
Period09/11/2209/11/24

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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