TY - CHAP
T1 - High speed large capacity inverter for power system apparatus
AU - Nakamori, Akira
AU - Eguchi, Naoya
AU - Nakanishi, Yoske
PY - 1996
Y1 - 1996
N2 - A large capacity inverter for power system apparatus is developed for simultaneously implementing inverter loss reduction, harmonic reduction, and system disturbance control. The inverter consists of a hybrid inverter of a GTO inverter and an insulated gate bipolar transistor inverter. The main circuit configuration of the hybrid inverter is presented and the inverter control system is outlined. The capabilities of the inverter are demonstrated by computer simulation and the harmonic characteristics in steady state and transient characteristics of system voltage dip are analyzed.
AB - A large capacity inverter for power system apparatus is developed for simultaneously implementing inverter loss reduction, harmonic reduction, and system disturbance control. The inverter consists of a hybrid inverter of a GTO inverter and an insulated gate bipolar transistor inverter. The main circuit configuration of the hybrid inverter is presented and the inverter control system is outlined. The capabilities of the inverter are demonstrated by computer simulation and the harmonic characteristics in steady state and transient characteristics of system voltage dip are analyzed.
UR - http://www.scopus.com/inward/record.url?scp=0030389472&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0030389472&partnerID=8YFLogxK
M3 - Chapter
AN - SCOPUS:0030389472
T3 - Proceedings of the IEEE Conference on Decision and Control
SP - 4472
EP - 4473
BT - Proceedings of the IEEE Conference on Decision and Control
A2 - Anon, null
T2 - Proceedings of the 35th IEEE Conference on Decision and Control. Part 4 (of 4)
Y2 - 11 December 1996 through 13 December 1996
ER -