High speed large capacity inverter for power system apparatus

Akira Nakamori*, Naoya Eguchi, Yoske Nakanishi

*この研究の対応する著者

研究成果: Chapter

10 被引用数 (Scopus)

抄録

A large capacity inverter for power system apparatus is developed for simultaneously implementing inverter loss reduction, harmonic reduction, and system disturbance control. The inverter consists of a hybrid inverter of a GTO inverter and an insulated gate bipolar transistor inverter. The main circuit configuration of the hybrid inverter is presented and the inverter control system is outlined. The capabilities of the inverter are demonstrated by computer simulation and the harmonic characteristics in steady state and transient characteristics of system voltage dip are analyzed.

本文言語English
ホスト出版物のタイトルProceedings of the IEEE Conference on Decision and Control
編集者 Anon
ページ4472-4473
ページ数2
出版ステータスPublished - 1996
外部発表はい
イベントProceedings of the 35th IEEE Conference on Decision and Control. Part 4 (of 4) - Kobe, Jpn
継続期間: 1996 12 111996 12 13

出版物シリーズ

名前Proceedings of the IEEE Conference on Decision and Control
4
ISSN(印刷版)0191-2216

Other

OtherProceedings of the 35th IEEE Conference on Decision and Control. Part 4 (of 4)
CityKobe, Jpn
Period96/12/1196/12/13

ASJC Scopus subject areas

  • 制御およびシステム工学
  • モデリングとシミュレーション
  • 制御と最適化

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