Highly linear high isolation SPDT switch IC with back-gate effect and floating body technique in 180-nm CMOS

Xiao Xu, Xin Yang, Zheng Sun, Taufiq Alif Kurniawan, Toshihiko Yoshimasu

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

This paper presents a broadband single-pole double-throw (SPDT) switch IC in a 180-nm CMOS process. Back-gate voltage injection and floating body technique are utilized to improve the power handling capability, insertion loss and isolation performance, simultaneously. The fabricated SPDT switch IC has exhibited an input referred 0.3-dB compression point of 21.0 dBm, an isolation of 42.7 dB and an insertion loss of 1.1 dB for transmit mode at an operation frequency of 5.0 GHz.

本文言語English
ホスト出版物のタイトル2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings
出版社Institute of Electrical and Electronics Engineers Inc.
ページ106-108
ページ数3
ISBN(電子版)9781467377942
DOI
出版ステータスPublished - 2016 1 8
イベントIEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Sendai, Japan
継続期間: 2015 8 262015 8 28

出版物シリーズ

名前2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings

Other

OtherIEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015
国/地域Japan
CitySendai
Period15/8/2615/8/28

ASJC Scopus subject areas

  • コンピュータ ネットワークおよび通信
  • 電子工学および電気工学

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