TY - JOUR
T1 - Impact of 0.10 μm SOI CMOS with body-tied hybrid trench isolation structure to break through the scaling crisis of silicon technology
AU - Hirano, Y.
AU - Matsumoto, T.
AU - Maeda, S.
AU - Iwamatsu, T.
AU - Kunikiyo, T.
AU - Nii, K.
AU - Yamamoto, K.
AU - Yamaguchi, Y.
AU - Ipposhi, T.
AU - Maegawa, S.
AU - Inuishi, M.
PY - 2000/12/1
Y1 - 2000/12/1
N2 - A hybrid-trench-isolation (HTI) technology is proposed to overcome the scaling limitations caused by the difficulty of gate thinning and increased soft error rate at the 0.1 μm era. It is revealed that a significant speed improvement against bulk is achieved by using the body-tied structure without floating-body-related speed deterioration. A two-order reduction in the soft error rate for an HTI-SOI 4M-bit SRAM was demonstrated as compared with bulk one. Moreover, it is presented that full trench isolation in the HTI offers excellent isolation characteristics to realize the one-chip integration of analog and digital LSI's. It is concluded that SOI technology with the HTI structure is one of the solutions against the scaling limitations.
AB - A hybrid-trench-isolation (HTI) technology is proposed to overcome the scaling limitations caused by the difficulty of gate thinning and increased soft error rate at the 0.1 μm era. It is revealed that a significant speed improvement against bulk is achieved by using the body-tied structure without floating-body-related speed deterioration. A two-order reduction in the soft error rate for an HTI-SOI 4M-bit SRAM was demonstrated as compared with bulk one. Moreover, it is presented that full trench isolation in the HTI offers excellent isolation characteristics to realize the one-chip integration of analog and digital LSI's. It is concluded that SOI technology with the HTI structure is one of the solutions against the scaling limitations.
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M3 - Conference article
AN - SCOPUS:17344383097
SP - 467
EP - 470
JO - Technical Digest - International Electron Devices Meeting
JF - Technical Digest - International Electron Devices Meeting
SN - 0163-1918
T2 - 2000 IEEE International Electron Devices Meeting
Y2 - 10 December 2000 through 13 December 2000
ER -