抄録
To achieve low-skew clock distribution, clock tree synthesis (CTS) for local clock optimization is used so far. Challenged by the increasing design complexity and performance demand, a new strategy for local clock optimization is used along with register placement for high-performance circuits. Special local clock distribution is used and registers are legalized to fit required skew. In this paper, we study the register placement problem and formulate it as a minimum weighted maximum independent set problem on a weighted conflict graph. Then, we propose a novel Lagrangian relaxation based algorithm. By relaxing the overlap conflict constraints, the problem is transformed into a minimum weighted bipartite matching problem. Experiments show that our method can efficiently place all registers without overlaps with minimized total register movement.
本文言語 | English |
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ホスト出版物のタイトル | Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009 |
ページ | 511-516 |
ページ数 | 6 |
DOI | |
出版ステータス | Published - 2009 |
イベント | 10th International Symposium on Quality Electronic Design, ISQED 2009 - San Jose, CA 継続期間: 2009 3月 16 → 2009 3月 18 |
Other
Other | 10th International Symposium on Quality Electronic Design, ISQED 2009 |
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City | San Jose, CA |
Period | 09/3/16 → 09/3/18 |
ASJC Scopus subject areas
- ハードウェアとアーキテクチャ
- 電子工学および電気工学