Leakage-Power-Aware Scheduling with Dual-Threshold Voltage Design

Nan Wang, Wei Zhong, Cong Hao, Song Chen, Takeshi Yoshimura, Yu Zhu

研究成果: Article査読

4 被引用数 (Scopus)


The exponential increase in leakage power and the substantial power-saving opportunities provided by scheduling have made dual-Threshold voltage (dual-Vth) an attractive choice for low-leakage-power designs. In this paper, we work under the assumption that functional units (FUs) are allocated after scheduling, and fully explore the solution space of scheduling with dual-Vth operations to optimize the leakage power of the FUs. First, a binding conflict graph (BCG)-based scheduling method is presented to minimize the number of FUs. Second, the BCG-based method is extended to allow scheduling with dual-Vth operation targeting the minimization of leakage power. In timing-constrained scheduling, each operation in the data flow is initialized with low-Vth. Then, starting from an operation schedule with the timing constraint satisfied, we scale the sets of low-Vth operations in the off-critical paths with high-Vth so as to reduce the number of low-Vth FUs without increasing the total delay. Finally, a scheduling method for minimizing the leakage power under both timing and resource constraints is presented. The results of benchmark tests show that the proposed algorithms can reduce the leakage power reported in previous works by 10.2% while maintaining high circuit performance.

ジャーナルIEEE Transactions on Very Large Scale Integration (VLSI) Systems
出版ステータスPublished - 2016 10月 1

ASJC Scopus subject areas

  • ソフトウェア
  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学


「Leakage-Power-Aware Scheduling with Dual-Threshold Voltage Design」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。