This paper describes a fast data processing LSI unit suitable for digital signal processing (DSP) applications in the field of electrical communications. The SLI processor discussed adopts a firmware control scheme to enhance the flexibility and freedom of application and extensively utilizes the pipeline processing technique to attain high speed data handling capability. The various operations encountered in DSP systems are unified into one operation and the LSI processor is designed to continuously perform this operation, while the data to be operated are transferred sequentially into the processor controlled by exterior firmware. The automatic equalizer for 4800 bit/s modem was implemented using two of the developed LSI processors and about 4 K ROM and 1 K RAM memory chips. The measurement on this modem gave the error rate of 10** minus **5 at S/N equals 1. 76 dB and error free phase jitter allowance of 55 degree p-p. Application of the LSI processor to digital filters for roll-off spectrum shaping and timing signal extraction is also described.
|ジャーナル||IEEE Transactions on Communications|
|出版ステータス||Published - 1978 5月|
ASJC Scopus subject areas
- コンピュータ ネットワークおよび通信