抄録
Description of a fast data processing LSI unit tailored to the digital signal processing (DSP) applications in the field of electrical communications. The results of successful application to the 4800 BPS modem are also given. The LSI processor discussed adopts a firmware control scheme to enhance the flexibility and freedom of application and extensively utilizes the pipeline processing technique to attain high speed data handling capability. The various operations encountered in DSP systems are unified into one unit operation of the type A multiplied by X plus C yields D and the LSI processor is designed to continuously perform this operation, while the data to be operated are transferred sequentially into the processor controlled by exterior firmware.
元の言語 | English |
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ホスト出版物のタイトル | Unknown Host Publication Title |
出版場所 | New York, NY |
出版者 | IEEE |
ページ | 207-211 |
ページ数 | 5 |
巻 | 1 |
出版物ステータス | Published - 1977 |
イベント | Conf Rec Int Conf Commun ICC '77, Chicag - Chicago, IL, USA 継続期間: 1977 6 12 → 1977 6 15 |
Other
Other | Conf Rec Int Conf Commun ICC '77, Chicag |
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市 | Chicago, IL, USA |
期間 | 77/6/12 → 77/6/15 |
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ASJC Scopus subject areas
- Engineering(all)
これを引用
LSI PROCESSOR FOR VOICEBAND SIGNALS. / Murano, Kazuo; Unagami, Shigeyuki; Tsuda, Toshitaka.
Unknown Host Publication Title. 巻 1 New York, NY : IEEE, 1977. p. 207-211.研究成果: Chapter
}
TY - CHAP
T1 - LSI PROCESSOR FOR VOICEBAND SIGNALS.
AU - Murano, Kazuo
AU - Unagami, Shigeyuki
AU - Tsuda, Toshitaka
PY - 1977
Y1 - 1977
N2 - Description of a fast data processing LSI unit tailored to the digital signal processing (DSP) applications in the field of electrical communications. The results of successful application to the 4800 BPS modem are also given. The LSI processor discussed adopts a firmware control scheme to enhance the flexibility and freedom of application and extensively utilizes the pipeline processing technique to attain high speed data handling capability. The various operations encountered in DSP systems are unified into one unit operation of the type A multiplied by X plus C yields D and the LSI processor is designed to continuously perform this operation, while the data to be operated are transferred sequentially into the processor controlled by exterior firmware.
AB - Description of a fast data processing LSI unit tailored to the digital signal processing (DSP) applications in the field of electrical communications. The results of successful application to the 4800 BPS modem are also given. The LSI processor discussed adopts a firmware control scheme to enhance the flexibility and freedom of application and extensively utilizes the pipeline processing technique to attain high speed data handling capability. The various operations encountered in DSP systems are unified into one unit operation of the type A multiplied by X plus C yields D and the LSI processor is designed to continuously perform this operation, while the data to be operated are transferred sequentially into the processor controlled by exterior firmware.
UR - http://www.scopus.com/inward/record.url?scp=0017690548&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0017690548&partnerID=8YFLogxK
M3 - Chapter
AN - SCOPUS:0017690548
VL - 1
SP - 207
EP - 211
BT - Unknown Host Publication Title
PB - IEEE
CY - New York, NY
ER -