Memory array architecture and decoding scheme for 3V only sector erasable DINOR flash memory

Shi ichi Kobayashi^*, Hiroaki Nakat, Yuichi Kunori, Takeshi Nakayama, Yoshikazu Miyawaki, Yasushi Terada, Hiroshi Onoda, Natsuo Ajika, Masahiro Hatanaka, Hirokazu Misyoshi, Tsutomu Yoshihara

^*この研究の対応する著者

研究成果: Conference contribution