METAL-INSULATOR-SEMICONDUCTOR (MIS) DEVICE USING A FERROELECTRIC POLYMER THIN FILM IN THE GATE INSULATOR.

研究成果: Chapter

61 引用 (Scopus)

抜粋

A nonvolatile MIS memory device using a ferroelectric polymer thin film in the gate insulator is proposed. In the gate electrode of the device, a ferroelectric polymer thin film is sandwiched between two insulator films to prevent carrier injection into the polymer thin film. Al-SiO//2-P (VDF/TrFE)-SiO//2-Si capacitors were fabricated to evaluate the basic characteristics of the device by C-V measurement, and ferroelectric polarization reversal was observed in the capacitors. Based on the C-V measurements, MIS transistors were fabricated using a process which virtually self-aligns the effective gate area to the source/drain. It was shown that the MIS transistor could be electrically programmed and erased. The on/off ratio of the transistor was greater than 10**6.

元の言語English
ホスト出版物のタイトルJapanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
ページ590-594
ページ数5
25
エディション4
出版物ステータスPublished - 1986 4
外部発表Yes

    フィンガープリント

ASJC Scopus subject areas

  • Engineering(all)

これを引用

Yamauchi, N. (1986). METAL-INSULATOR-SEMICONDUCTOR (MIS) DEVICE USING A FERROELECTRIC POLYMER THIN FILM IN THE GATE INSULATOR.Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes (4 版, 巻 25, pp. 590-594)