This paper describes mixed constrained image filter design for noise reduction using a Genetic Algorithm (GA) with parameterized uniform crossover. The proposed method with GA autonomously synthesizes a filter suitable for the reconfigurable processing array, evaluating the complexity, power and signal delay in both Configurable Logic Blocks (CLBs) and wires. An image filter for noise reduction is experimentally synthesized to verify the validity of the proposed method. By the evolution, the quality of the optimized image filter is better than that reported in other papers.
|ジャーナル||IEEJ Transactions on Electronics, Information and Systems|
|出版物ステータス||Published - 2011|
ASJC Scopus subject areas
- Electrical and Electronic Engineering