Multiple test set generation method for LFSR-based BIST

Youhua Shi, Zhe Zhang

研究成果: Conference contribution

8 引用 (Scopus)

抜粋

In this paper we propose a new reseeding method for LFSR-based test pattern generation suitable for circuits with random pattern resistant faults. The character of our method is that the proposed test pattern generator (TPG) can work both in normal LFSR mode, to generate pseudorandom test vectors, and in jumping mode to make the TPG jump from a state to the required state (seed of next group). Experimental results indicate that its superiority against other known reseeding techniques with respect to the length of the test sequence and the required area overhead.

元の言語English
ホスト出版物のタイトルProceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference
出版者Institute of Electrical and Electronics Engineers Inc.
ページ863-868
ページ数6
ISBN(電子版)0780376595
DOI
出版物ステータスPublished - 2003 1 1
イベントAsia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan
継続期間: 2003 1 212003 1 24

出版物シリーズ

名前Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2003-January

Other

OtherAsia and South Pacific Design Automation Conference, ASP-DAC 2003
Japan
Kitakyushu
期間03/1/2103/1/24

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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  • これを引用

    Shi, Y., & Zhang, Z. (2003). Multiple test set generation method for LFSR-based BIST. : Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference (pp. 863-868). [1195138] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 巻数 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2003.1195138