New CR-delay circuit technology for high-density and high-speed DRAMs

Yohji Watanabe, Takashi Ohsawa, Kiyofumi Sakurai, Tohru Furuyama

研究成果: Paper

1 引用 (Scopus)

抜粋

A CR-delay circuit technology for the realization of high-speed operation with a wide operational margin and minimized timing loss is discussed. It was applied to a 4-Mb CMOS DRAM, and the experimental results are described. A significant reduction in access time and cycle time was achieved.

元の言語English
ページ75-76
ページ数2
出版物ステータスPublished - 1988 12 1
イベント1988 Symposium on VLSI Circuits - Digest of Technical Papers - Tokyo, Japan
継続期間: 1988 8 221988 8 24

Other

Other1988 Symposium on VLSI Circuits - Digest of Technical Papers
Tokyo, Japan
期間88/8/2288/8/24

ASJC Scopus subject areas

  • Engineering(all)

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  • これを引用

    Watanabe, Y., Ohsawa, T., Sakurai, K., & Furuyama, T. (1988). New CR-delay circuit technology for high-density and high-speed DRAMs. 75-76. 論文発表場所 1988 Symposium on VLSI Circuits - Digest of Technical Papers, Tokyo, Japan, .