抄録
The incremental simulation algorithm speeds up the simulation of digital hardware by storing and reusing simulation events. For large circuits, in order to reduce the amount of events to be stored, it is necessary to select nets and store only the events relevant to those nets. Our new incremental simulation algorithm selects nets according to expected amounts of evaluation eliminated by storing each net's simulation events. Compared to traditional net selection algorithm, speedups of 1.78 to 1.94 were achievable with our algorithm.
| 本文言語 | English |
|---|---|
| ページ | 343-346 |
| ページ数 | 4 |
| 出版ステータス | Published - 1995 12 1 |
| 外部発表 | はい |
| イベント | Proceedings of the 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, TENCON'95 - Hong Kong, Hong Kong 継続期間: 1995 11 6 → 1995 11 10 |
Other
| Other | Proceedings of the 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, TENCON'95 |
|---|---|
| City | Hong Kong, Hong Kong |
| Period | 95/11/6 → 95/11/10 |
ASJC Scopus subject areas
- コンピュータ サイエンスの応用
- 電子工学および電気工学