New incremental simulation algorithm for large scale circuits and its evaluation

Hiroshi Arai, Yoshiaki Fukazawa

研究成果: Paper査読

2 被引用数 (Scopus)

抄録

The incremental simulation algorithm speeds up the simulation of digital hardware by storing and reusing simulation events. For large circuits, in order to reduce the amount of events to be stored, it is necessary to select nets and store only the events relevant to those nets. Our new incremental simulation algorithm selects nets according to expected amounts of evaluation eliminated by storing each net's simulation events. Compared to traditional net selection algorithm, speedups of 1.78 to 1.94 were achievable with our algorithm.

本文言語English
ページ343-346
ページ数4
出版ステータスPublished - 1995 12 1
外部発表はい
イベントProceedings of the 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, TENCON'95 - Hong Kong, Hong Kong
継続期間: 1995 11 61995 11 10

Other

OtherProceedings of the 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, TENCON'95
CityHong Kong, Hong Kong
Period95/11/695/11/10

ASJC Scopus subject areas

  • コンピュータ サイエンスの応用
  • 電子工学および電気工学

フィンガープリント

「New incremental simulation algorithm for large scale circuits and its evaluation」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル