Nonvolatile low power 16-bit/32-bit magnetic tunnel junction based binary counter and its scaling

Shuta Togashi, Takashi Ohsawa, Tetsuo Endoh

研究成果: Article査読

4 被引用数 (Scopus)

抄録

We propose a nonvolatile 16-bit/32-bit magnetic tunnel junction (MTJ) based binary counter with fine-grained power gating scheme suitable for MTJ. We estimate the power consumption of the proposed counter by using simulation program with integrated circuit emphasis (SPICE) simulation. The power of the proposed 16-bit/32-bit counter is 59.1 and 72.5% smaller in case of 45 and 16nm node, respectively, than that of the conventional complementary metal oxide semiconductor (CMOS) counter at low frequency (100 Hz). The proposed nonvolatile 32-bit counter achieves lower power at operating frequencies up to 49 kHz and 4 MHz in the case of 45 and 16nm node, respectively, in comparison with the conventional CMOS counter. Moreover, we propose a hybrid 32-bit counter that is constructed with CMOS counter units for the beginning stages and nonvolatile MTJ based counter units for the latter stages. It achieves a lower power at operating frequencies up to 1 GHz than the conventional CMOS counter for 16nm node. As a result, clear scalability of the proposed MTJ based multi-bit counter is obtained from the viewpoint of suppressing power.

本文言語English
論文番号02BE07
ジャーナルJapanese journal of applied physics
51
2 PART 2
DOI
出版ステータスPublished - 2012 2 1
外部発表はい

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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