Novel and efficient min cut based voltage assignment in gate level

Tao Lin*, Sheqin Dong, Song Chen, Yuchun Ma, Ou He, Satoshi Goto

*この研究の対応する著者

研究成果: Conference contribution

5 被引用数 (Scopus)

抄録

In this paper, we propose a novel min cut based algorithm for multiple supply voltage assignment under timing constraints. Different with the traditional sensitivity based methods which focus on how to make full use of the slacks of non-critical gates, the proposed algorithm concentrates on critical gates. The circuit is initialized in the lowest power level, then the length of critical paths is tried to be shortened with the minimized power increment until the timing constraints are satisfied. Experimental results show that given dual-vdd, our method beats traditional methods both in power saving and runtime, especially runtime.

本文言語English
ホスト出版物のタイトルProceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011
ページ150-155
ページ数6
DOI
出版ステータスPublished - 2011
イベント12th International Symposium on Quality Electronic Design, ISQED 2011 - Santa Clara, CA
継続期間: 2011 3 142011 3 16

Other

Other12th International Symposium on Quality Electronic Design, ISQED 2011
CitySanta Clara, CA
Period11/3/1411/3/16

ASJC Scopus subject areas

  • 電子工学および電気工学

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