Novel polysilicon source/drain transistor with self-aligned silicidation.

M. Shimizu*, M. Inuishi, H. Miyatake, H. Morita, K. Tsukamoto, Y. Akasaka

*この研究の対応する著者

研究成果: Conference article査読

1 被引用数 (Scopus)

抄録

A poly-Si S/D transistor with self-aligned titanium silicidation has been developed without a sidewall spacer. It has excellent electrical characteristics and the transistor performance is improved by the reduction of poly-Si resistance. The effects of etching damage of the active channel regions on the transistor characteristics are investigated. It is concluded that the etching damage is removed by sacrifice oxidation of 20 nm.

本文言語English
ページ(範囲)11-12
ページ数2
ジャーナルDigest of Technical Papers - Symposium on VLSI Technology
出版ステータスPublished - 1988 12 1
外部発表はい

ASJC Scopus subject areas

  • 電子工学および電気工学

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