ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION.

Hirohisa Gambe; Toshi Ikezawa; Toshihiko Matsumura; Toshitaka Tsuda; Shigeru Fujii

ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION.

Hirohisa Gambe^*, Toshi Ikezawa, Toshihiko Matsumura, Toshitaka Tsuda, Shigeru Fujii

^*この研究の対応する著者

研究成果: Article › 査読

1 被引用数 (Scopus)

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This paper describes the design of a highly efficient CMOS LSI circuit digital signal processor (FDSP3). To realize an operating cycle rate of 10 MHz and a throughput rate of 0. 6 mu s per second-order filter section, considerable care has been paid to the design of software structures and hardware circuitry. Basic program routines and some application examples are shown. These examples illustrate the high efficiency of the developed DSP device.

本文言語	English
ページ（範囲）	357-368
ページ数	12
ジャーナル	IEEE Journal on Selected Areas in Communications
巻	SAC-3
号	2
出版ステータス	Published - 1985 3月

ASJC Scopus subject areas

コンピュータネットワークおよび通信
電子工学および電気工学

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引用スタイル

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AU - Fujii, Shigeru

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ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION.

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ASJC Scopus subject areas

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