ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION.

Hirohisa Gambe, Toshi Ikezawa, Toshihiko Matsumura, Toshitaka Tsuda, Shigeru Fujii

    研究成果: Article

    1 引用 (Scopus)

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    This paper describes the design of a highly efficient CMOS LSI circuit digital signal processor (FDSP3). To realize an operating cycle rate of 10 MHz and a throughput rate of 0. 6 mu s per second-order filter section, considerable care has been paid to the design of software structures and hardware circuitry. Basic program routines and some application examples are shown. These examples illustrate the high efficiency of the developed DSP device.

    元の言語English
    ページ(範囲)357-368
    ページ数12
    ジャーナルIEEE Journal on Selected Areas in Communications
    SAC-3
    発行部数2
    出版物ステータスPublished - 1985 3

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    ASJC Scopus subject areas

    • Computer Networks and Communications
    • Electrical and Electronic Engineering

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