Parallel design of control systems utilizing dead time for embedded multicore processors

Yuta Suzuki, Kota Sata, Junichi Kako, Kohei Yamaguchi, Fumio Arakawa, Masato Edahiro

研究成果: Conference contribution

4 被引用数 (Scopus)

抄録

This paper presents a parallelization method utilizing dead time to implement higher precision control systems on multi-core processors. It is known that dead time is hard to handle with in control systems. In our method, the dead time is explicitly represented as delay blocks of models such as Simulink. Then, these delay blocks are distributed to the overall systems with equivalent transformation, so that the system can be simulated or executed in pipeline parallel. With a spring-mass-damper model, our technique accomplishes x3.4 performance acceleration on an ideal four-core simulation, and x1.8 on cycle-accurate simulator of a four-core embedded processor as a threaded application on a real time operating system.

本文言語English
ホスト出版物のタイトルIEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII
出版社IEEE Computer Society
ISBN(印刷版)9781479938094
DOI
出版ステータスPublished - 2014
外部発表はい
イベント17th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2014 - Yokohama, Japan
継続期間: 2014 4月 142014 4月 16

出版物シリーズ

名前IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII

Other

Other17th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2014
国/地域Japan
CityYokohama
Period14/4/1414/4/16

ASJC Scopus subject areas

  • 電子工学および電気工学

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