Performance Evaluation of OSCAR Multi-target Automatic Parallelizing Compiler on Intel, AMD, Arm and RISC-V Multicores

Birk Martin Magnussen*, Tohma Kawasumi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara

*この研究の対応する著者

研究成果: Conference contribution

抄録

With an increasing number of shared memory multicore processor architectures, there is a requirement for supporting multiple architectures in automatic parallelizing compilers. The OSCAR (Optimally Scheduled Advanced Multiprocessor) automatic parallelizing compiler is able to parallelize many different sequential programs, such as scientific applications, embedded real-time applications, multimedia applications, and more. OSCAR compiler’s features include coarse-grain task parallelization with earliest execution condition analysis, analyzing both data and control dependencies, data locality optimizations over different loop nests with data dependencies, and the ability to generate parallelized code using the OSCAR API 2.1. The OSCAR API 2.1 is compatible with OpenMP for SMP multicores, with additional directives for power control and supporting heterogeneous multicores. This allows for a C or Fortran compiler with OpenMP support to generate parallel machine code for the target multicore. Additionally, using the OSCAR API analyzer allows a sequential-only compiler without OpenMP support to generate machine code for each core separately, which is then linked to one parallel application. Overall, only little configuration changes to the OSCAR compiler are needed to run and optimize OSCAR compiler-generated code on a specific platform. This paper evaluates the performance of OSCAR compiler-generated code on different modern SMP multicore processors, including Intel and AMD x86 processors, an Arm processor, and a RISC-V processor using scientific and multimedia benchmarks in C and Fortran. The results show promising speedups on all platforms, such as a speedup of 7.16 for the swim program of the SPEC2000 benchmarks on an 8-core Intel x86 processor, a speedup of 9.50 for the CG program of the NAS parallel benchmarks on 8 cores of an AMD x86 Processor, a speedup of 3.70 for the BT program of the NAS parallel benchmarks on a 4-core RISC-V processor, and a speedup of 2.64 for the equake program of the SPEC2000 benchmarks on 4 cores of an Arm processor.

本文言語English
ホスト出版物のタイトルLanguages and Compilers for Parallel Computing - 34th International Workshop, LCPC 2021, Revised Selected Papers
編集者Xiaoming Li, Sunita Chandrasekaran
出版社Springer Science and Business Media Deutschland GmbH
ページ50-64
ページ数15
ISBN(印刷版)9783030993719
DOI
出版ステータスPublished - 2022
イベント34th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2021 - Newark, United States
継続期間: 2021 10月 132021 10月 14

出版物シリーズ

名前Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
13181 LNCS
ISSN(印刷版)0302-9743
ISSN(電子版)1611-3349

Conference

Conference34th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2021
国/地域United States
CityNewark
Period21/10/1321/10/14

ASJC Scopus subject areas

  • 理論的コンピュータサイエンス
  • コンピュータ サイエンス(全般)

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