抄録
The Fast Track processor (FTK) has been proposed for high-quality track finding at very high rates (Level-1 output rates) for the LHC experiments. Fast, efficient and precise pattern recognition has been studied using a silicon 7-layer sub-detector, including a subset of the pixel and SCT layers. We tested the FTK algorithms using the ATLAS full simulation. We compare the FTK reconstruction quality with the tracking capability of the offline iPatRec algorithm. We show that similar resolutions and efficiencies are reached by FTK at a speed higher than iPatRec by orders of magnitude. With FTK full events are reconstructed at the Level-1 output rate. Bs0 → μ+μ- events are fully simulated together with background samples. We show that a low Level-2 rate is allowed by FTK, even using a single 6 GeV Level-1 muon selection trigger. FTK provides the full-resolution track list ready for the Level-2 Bs0 identification. All selection cuts performed by the Event Filter can be easily anticipated at Level-2. We present the Bs0 → μ+μ- efficiency gain and related Level-2 rates.
本文言語 | English |
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ページ(範囲) | 145-150 |
ページ数 | 6 |
ジャーナル | IEEE Transactions on Nuclear Science |
巻 | 55 |
号 | 1 |
DOI | |
出版ステータス | Published - 2008 2月 |
外部発表 | はい |
ASJC Scopus subject areas
- 核物理学および高エネルギー物理学
- 原子力エネルギーおよび原子力工学
- 電子工学および電気工学