Permutation network for reconfigurable LDPC decoder based on banyan network

Xiao Peng*, Zhixiang Chen, Xiongxin Zhao, Fumiaki Maehara, Satoshi Goto

*この研究の対応する著者

研究成果: Article査読

1 被引用数 (Scopus)

抄録

Since the structured quasi-cyclic low-density parity-check (QC-LDPC) codes for most modern wireless communication systems include multiple code rates, various block lengths, and the corresponding different sizes of submatrices in parity check matrix (PCM), the reconfigurable LDPC decoder is desirable and the permutation network is needed to accommodate any input number (IN) and shift number (SN) for cyclic shift. In this paper, we propose a novel permutation network architecture for the reconfigurable QC-LDPC decoders based on Banyan network. We prove that Banyan network has the nonblocking property for cyclic shift when the IN is power of 2, and give the control signal generating algorithm. Through introducing the bypass network, we put forward the nonblocking scheme for any IN and SN. In addition, we present the hardware design of the control signal generator, which can greatly reduce the hardware complexity and latency. The synthesis results using the TSMC 0.18 μm library demonstrate that the proposed permutation network can be implemented with the area of 0.546 mm2 and the frequency of 292 MHz.

本文言語English
ページ(範囲)270-278
ページ数9
ジャーナルIEICE Transactions on Electronics
E93-C
3
DOI
出版ステータスPublished - 2010 1 1

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

フィンガープリント

「Permutation network for reconfigurable LDPC decoder based on banyan network」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル