Post-silicon clock deskew employing hot-carrier injection trimming with on-chip skew monitoring and auto-stressing scheme for sub/near threshold digital circuits

Yu Pu, Xin Zhang, Katsuyuki Ikeuchi, Atsushi Muramatsu, Atsushi Kawasumi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai

研究成果: Article査読

抄録

Clock skew is a major cause of severe timing yield degradation for sub-/near-threshold digital circuits. We report for the first time on employing hot-carrier injection (HCI) for post-silicon clock-deskew trimming. An HCI trimmed clock buffer, which can be individually selected and stressed to adjust the clock edge, is proposed. In addition, it can be used in conjunction with on-chip skew monitoring circuits to achieve auto-stressing. Our approach is proven to be effective through a representative 1.1-mm × 0.8-mm clock tree in a 40-nm high-k complimentary metal-oxide-semiconductor process. On average, it reduces the clock skew by eight times at 0.4 V V\rm dd. No significant recovery is noticed two weeks after trimming.

本文言語English
論文番号5772921
ページ(範囲)294-298
ページ数5
ジャーナルIEEE Transactions on Circuits and Systems II: Express Briefs
58
5
DOI
出版ステータスPublished - 2011 5
外部発表はい

ASJC Scopus subject areas

  • 電子工学および電気工学

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