Program slicing on vhdl descriptions and its evaluation

Shigeru Ichinoset, Mizuho Iwaihara, Hiroto Yasuura

研究成果: Article査読

9 被引用数 (Scopus)

抄録

Providing various assistances for design modifications on HDL source codes is important for design reuse and quick design cycle in VLSI CAD. Program slicing is a softwareengineering technique for analyzing, abstracting, and transforming programs. We show algorithms for extracting/removing behaviors of specified signals in VHDL descriptions. We also describe a VHDL slicing system and show experimental results of efficiently extracting components from VHDL descriptions.

本文言語English
ページ(範囲)2585-2594
ページ数10
ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E81-A
12
出版ステータスPublished - 1998
外部発表はい

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

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