Reduced reconfigurable logic circuit design based on double gate CNTFETs using ambipolar binary decision diagram

Hiroshi Ninomiya, Manabu Kobayashi, Shigeyoshi Watanabe

研究成果: Article

6 引用 (Scopus)

抜粋

This letter describes the design methodology for reduced reconfigurable logic circuits based on double gate carbon nanotube field effect transistors (DG-CNTFETs) with ambipolar propoerty. Ambipolar Binary Decision Diagram (Am-BDD) which represents the cornerstone for automatic pass transistor logic (PTL) synthesis flows of ambipolar devices was utilized to build DG-CNTFET based n-input reconfigurable cells in the conventional approach. The proposed method can reduce the number of ambipolar devices for 2-inputs reconfigurable cells, incorporating the simple Boolean algebra in the Am-BDD compared with the conventional approach. As a result, the static 2-inputs reconfigurable circuit with 16 logic functions can be synthesized by using 8 DG-CNTFETs although the previous design method needed 12 DG-CNTFETs for the same purpose.

元の言語English
ページ(範囲)356-359
ページ数4
ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E96-A
発行部数1
DOI
出版物ステータスPublished - 2013 1
外部発表Yes

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

フィンガープリント Reduced reconfigurable logic circuit design based on double gate CNTFETs using ambipolar binary decision diagram' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。

  • これを引用