Optimizing compilation is very important for generating code sequences in order to utilize the characteristics of processor architectures. One of the most essential optimization techniques is register allocation. In register allocation that takes account of instruction-level parallelism, anti-dependences generated when the same register is allocated to different variables, and spill code generated when the number of registers is insufficient should be handled in such a way that the parallelism in a program is not lost. In our method, we realized register allocation using a new data structure called the register existence graph, in which the parallelism in a program is well expressed.
|ジャーナル||Proceedings of the International Conference on Parallel Processing|
|出版物ステータス||Published - 1997 1 1|
|イベント||Proceedings of the 1997 International Conference on Parallel Processing - Bloomington, IL, USA|
継続期間: 1997 9 11 → 1997 9 15
ASJC Scopus subject areas
- Hardware and Architecture