Register allocation technique using register existence graph

A. Koseki, H. Komastu, Y. Fukazawa

研究成果: Conference article

抜粋

Optimizing compilation is very important for generating code sequences in order to utilize the characteristics of processor architectures. One of the most essential optimization techniques is register allocation. In register allocation that takes account of instruction-level parallelism, anti-dependences generated when the same register is allocated to different variables, and spill code generated when the number of registers is insufficient should be handled in such a way that the parallelism in a program is not lost. In our method, we realized register allocation using a new data structure called the register existence graph, in which the parallelism in a program is well expressed.

元の言語English
ページ(範囲)404-411
ページ数8
ジャーナルProceedings of the International Conference on Parallel Processing
出版物ステータスPublished - 1997 1 1
イベントProceedings of the 1997 International Conference on Parallel Processing - Bloomington, IL, USA
継続期間: 1997 9 111997 9 15

ASJC Scopus subject areas

  • Hardware and Architecture

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